Contact

Tel	_	+49 681 302-57522
Fax	_	+49 681 302-3065
Mail	_
Room	_	403
Address	_	Saarland Informatics Campus Building E1 3 66123 Saarbrücken Germany
ORCID	_	0000-0003-2656-9863

Joachim Meyer

Curriculum Vitae

• CV

Research Interests

• High performance computing
• Heterogeneous compute
• Parallel programming
• Compilation techniques to improve all of the above

Projects

• AnyDSL: A framework to develop heterogeneous, high-performance domain-specific languages with an emphasis on extensiblity.
• HPC@UdS: Advancing HPC at Saarland University and providing services as part of NHR SW.

Publications

Workshop Papers

• Evaluation of Modern GPGPU Technologies for Image Processing
  Meyer, J.
  Proceedings of the International Workshop on OpenCL, Association for Computing Machinery, 2020. [doi] [url] [bib]
  

  @inproceedings{Meyer:IWOCL20:10.1145/3388333.3388645,
   author = {Meyer, Joachim},
   title = {Evaluation of Modern GPGPU Technologies for Image Processing},
   year = {2020},
   isbn = {9781450375313},
   publisher = {Association for Computing Machinery},
   address = {New York, NY, USA},
   url = {https://doi.org/10.1145/3388333.3388645},
   doi = {10.1145/3388333.3388645},
   booktitle = {Proceedings of the International Workshop on OpenCL},
   articleno = {2},
   numpages = {2},
   keywords = {CUDA, Vulkan, SYCL, OpenCL, Image Processing, GPGPU, Evaluation},
   location = {Munich, Germany},
   series = {IWOCL '20}
   }

MSc Thesis

• Compiler-assisted optimizations for data-parallel paradigms in hipSYCL
  Meyer, J.
  M.Sc. Thesis, Heidelberg University, 2021. [pdf] [bib]
  

  @MASTERSTHESIS{Meyer:2021:MSc,
       author  = {Joachim Meyer},
       title   = {{Compiler-assisted optimizations for data-parallel paradigms in hipSYCL}},
       school  = {Heidelberg University},
       year    = {2021},
       month   = {November},
       webpdf  = {http://www.cdl.uni-saarland.de/publications/theses/meyer_msc.pdf}
   }

Other

• Compiler-Aided Nd-Range Parallel-for Implementations on CPU in HipSYCL
  Meyer, J., Alpay, A., Fröning, H. and Heuveline, V.
  [doi] [url] [bib]
  

  @OTHER{Meyer:IWOCL22:10.1145/3529538.3530216,
     author = {Meyer, Joachim and Alpay, Aksel and Fr\"oning, Holger and Heuveline, Vincent},
     title = {Compiler-Aided Nd-Range Parallel-for Implementations on CPU in HipSYCL},
     year = {2022},
     isbn = {9781450396585},
     publisher = {Association for Computing Machinery},
     address = {New York, NY, USA},
     url = {https://doi.org/10.1145/3529538.3530216},
     doi = {10.1145/3529538.3530216},
     abstract = {With heterogeneous programming continuously on the rise, performance portability is still to be improved. SYCL provides the nd-range parallel-for paradigm for writing data-parallel kernels. This model allows barriers for group-local synchronization, similar to CUDA and OpenCL kernels. GPUs provide efficient means to model this, but on CPUs the necessary forward-progress guarantees require the use of many (lightweight) threads in library-only SYCL implementations, rendering the nd-range parallel-for unacceptably inefficient. By adopting two compiler-based approaches solving this, the present work improves the performance of the nd-range parallel-for in hipSYCL for CPUs by up to multiple orders of magnitude on various CPU architectures. The two alternatives are compared with regard to their functional correctness and performance. By upstreaming one of the variants, hipSYCL is the first SYCL implementation to provide a well performing nd-range parallel-for on CPU, without requiring an available OpenCL runtime.},
     booktitle = {International Workshop on OpenCL},
     articleno = {28},
     numpages = {3},
     keywords = {performance portability, SYCL, OpenCL, heterogeneous, nd-range, CPU, LLVM, compilation},
     location = {Bristol, United Kingdom, United Kingdom},
     series = {IWOCL'22}
   }