We do research on compilers, programming languages, and program analysis to make programming modern heterogeneous systems more efficient and effective. Our recent focus is on:

  • Implementing Domain-specific Languages using Partial Evaluation
  • Vectorization of Irregular Low-Level Code
  • Deriving Performance Models of Modern Hardware

Our current projects and tools include:


Summer 2024


Previous Semesters

BSc/MSc Theses and Hiwi Jobs

We have a variety of BSc/MSC topics and Hiwi jobs available. Please take a look at our list of proposed topics or contact Sebastian Hack.


Mar 2024
Our work on Explainable Port Mappings for AMD Zen+ was accepted at ASPLOS 2024.
Sep 2022
Our work on Analyzing Inconsistencies in Microarchitectural Code Analyzers was accepted at OOPSLA 2022.
May 2022
We have a paper at ICS 2022 together with Bertil Schmidt's group on AnySeq/GPU, a high-performance sequence alignment library for GPUs written in AnyDSL.
Jul 2021
Our work on PICO was accepted for the ACM Transactions on Architecture and Code Optimization. PICO is an optimization for programs that were instrumented by a memory safety instrumentation. It models memory accesses with Presburger formulas and combines such formulas to secure multiple accesses with a single check and moves these checks to infrequently executed locations. In our experiments, PICO reduces the execution-time overhead introduced by SoftBound by 36% on average and the code-size overhead by 24%.
Oct 2020
Our work on an abstract interpretation for SPMD thread divergence was accepted for POPL 2021 and was selected as distiguished paper. The analysis is accompanied by a Coq development to prove its soundness and a C++ implementation of the analysis has been upstreamed to LLVM. The version available here also features a more detailed presentation of the experimental results and an implementation guide.
Apr 2020
PMEvo, our work on inferring port mappings of out-of-order processors by time measurements was accepted at PLDI 2020.
Jan 2020
We have a paper at IPDPS 2020 together with Bertil Schmidt's group on AnySeq, a high-performance sequence alignment library written in AnyDSL that compiles to CPUs, GPUs, and FPGAs from the same code base and is competitive with codes that have been developed for a specific hardware architecture.
Jul 2019
Sebastian has taught a one-week course on compilers at the ACACES 2019 summer school.
Jul 2019
Our joint paper Rodent: Generating Renderers without Writing a Generator with the graphics group at Saarland University was accepted at SIGGRAPH 2019.
Jun 2018
Our paper on AnyDSL was accepted at OOPSLA 2018. AnyDSL is a clean-slate programming system with a simple, annotation-based, online partial evaluator that operates on our CPS-based IR Thorin and has code generators for various accelerators.
Feb 2018
Our paper on partially linearizing control flow was accepted at PLDI 2018. Partial control flow linearization generalizes if conversion to incorporate the results of a divergence analysis without imposing restrictions on the control flow graph.