- PICO: A Presburger In-bounds Check Optimization for Compiler-based Memory Safety Instrumentations
Jung, T., Ritter, F. and Hack, S.
ACM Trans. Archit. Code Optim., 18 (4), 2021.
[doi]
[url]
[bib]
@article{JRH:TACO21,
author = {Jung, Tina and Ritter, Fabian and Hack, Sebastian},
title = {PICO: A Presburger In-bounds Check Optimization for Compiler-based Memory Safety Instrumentations},
year = {2021},
issue_date = {July 2021},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {18},
number = {4},
issn = {1544--3566},
url = {https://doi.org/10.1145/3460434},
doi = {10.1145/3460434},
journal = {ACM Trans. Archit. Code Optim.},
month = jul,
articleno = {45},
numpages = {27},
keywords = {spatial memory safety, LLVM, Presburger, C language, Optimization}
}
- AnyHLS: High-Level Synthesis with Partial Evaluation
Özkan, M. A., Pérard-Gayot, A., Membarth, R., Slusallek, P., Leißa, R., Hack, S., Teich, J. and Hannig, F.
CoRR, abs/2002.05796, 2020.
[url]
[pdf]
[bib]
@article{DBLP:journals/corr/abs-2002-05796,
author = {M. Akif Özkan and Arsène Pérard-Gayot and Richard Membarth and Philipp Slusallek and Roland Lei{\ss}a and Sebastian Hack and J{\"{u}}rgen Teich and Frank Hannig},
title = {AnyHLS: High-Level Synthesis with Partial Evaluation},
journal = {CoRR},
volume = {abs/2002.05796},
year = {2020},
url = {https://arxiv.org/abs/2002.05796},
archivePrefix = {arXiv},
eprint = {2002.05796},
timestamp = {Mon, 02 Mar 2020 16:46:06 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2002-05796.bib},
bibsource = {dblp computer science bibliography, https://dblp.org},
webpdf = {https://arxiv.org/pdf/2002.05796.pdf}
}
- Generating induction principles and subterm relations for inductive
types using MetaCoq
Liesnikov, B., Ullrich, M. and Forster, Y.
CoRR, abs/2006.15135, 2020.
[url]
[bib]
@article{DBLP:journals/corr/abs-2006-15135,
author = {Bohdan Liesnikov and Marcel Ullrich and Yannick Forster},
title = {Generating induction principles and subterm relations for inductive
types using MetaCoq},
journal = {CoRR},
volume = {abs/2006.15135},
year = {2020},
url = {https://arxiv.org/abs/2006.15135},
eprinttype = {arXiv},
eprint = {2006.15135},
timestamp = {Sat, 23 Jan 2021 01:12:25 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-15135.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
- Rodent: generating renderers without writing a generator - SIGGRAPH 2019
Pérard-Gayot, A., Membarth, R., Leißa, R., Hack, S. and Slusallek, P.
ACM Trans. Graph., 38 (4): 40:1–40:12, 2019.
[doi]
[url]
[pdf]
[bib]
@article{DBLP:journals/tog/Perard-GayotMLH19,
author = {Arsène Pérard-Gayot and Richard Membarth and Roland Lei{\ss}a and Sebastian Hack and Philipp Slusallek},
title = {Rodent: generating renderers without writing a generator},
journal = {{ACM} Trans. Graph.},
volume = {38},
number = {4},
pages = {40:1--40:12},
year = {2019},
url = {https://doi.org/10.1145/3306346.3322955},
doi = {10.1145/3306346.3322955},
booktitle_short = {SIGGRAPH},
timestamp = {Thu, 25 Jul 2019 14:10:56 +0200},
biburl = {https://dblp.org/rec/bib/journals/tog/Perard-GayotMLH19},
bibsource = {dblp computer science bibliography, https://dblp.org},
webpdf = {https://compilers.cs.uni-saarland.de/papers/perard-2019-siggraph-rodent.pdf}
}
- The Impact of the SIMD Width on Control-Flow and Memory Divergence - TACO 2015
Schaub, T., Moll, S., Karrenberg, R. and Hack, S.
ACM Transactions on Architecture and Code Optimization, 11 (4): 54:1–54:25, 2015.
[doi]
[url]
[bib]
@article{Schaub:2015:SIMD,
author = {Schaub, Thomas and Moll, Simon and Karrenberg, Ralf and Hack, Sebastian},
title = {{T}he {I}mpact of the {SIMD} {W}idth on {C}ontrol-{F}low and {M}emory {D}ivergence},
journal = {ACM Transactions on Architecture and Code Optimization},
booktitle_short = {TACO},
issue_date = {January 2015},
volume = {11},
number = {4},
month = jan,
year = {2015},
issn = {1544-3566},
pages = {54:1--54:25},
articleno = {54},
numpages = {25},
url = {http://doi.acm.org/10.1145/2687355},
doi = {10.1145/2687355},
acmid = {2687355},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Data parallelism, GPGPU, OpenCL, SIMD, divergent control flow, memory access patterns, performance analysis, vectorization},
}
- Generalized Task Parallism - TACO 2015
Streit, K., Hammacher, C., Doerfert, J., Hack, S. and Zeller, A.
ACM Transactions on Architecture and Code Optimiziation, 12 (1), 2015.
[bib]
@article{Streit:2015:GenTaskPar,
author = {Kevin Streit and Clemens Hammacher and Johannes Doerfert and Sebastian Hack and Andreas Zeller},
title = {{G}eneralized {T}ask {P}arallism},
journal = {ACM Transactions on Architecture and Code Optimiziation},
booktitle_short = {TACO},
issue_date = {March 2015},
volume = {12},
number = {1},
month = mar,
year = {2015},
publisher = {ACM},
address = {New York, NY, USA},
}
- Code Refinement of Stencil Codes - PPL 2014
Köster, M., Leißa, R., Hack, S., Membarth, R. and Slusallek, P.
Parallel Processing Letters, 24 (3): 1–16, 2014.
[doi]
[pdf]
[bib]
@ARTICLE{KLHMS:2014:PPL,
author = {K{\"o}ster, Marcel and Lei{\ss}a, Roland and Hack, Sebastian and Membarth, Richard and Slusallek, Philipp},
title = {{C}ode {R}efinement of {S}tencil {C}odes},
journal = {Parallel Processing Letters},
booktitle_short = {PPL},
pages = {1--16},
volume = {24},
number = {3},
year = 2014,
month = sep,
date = {2014-09},
doi = {10.1142/S0129626414410035},
publisher = {World Scientific},
webpdf = {http://www.cdl.uni-saarland.de/papers/ppl14_web.pdf},
}
- Automatically Generating Test Cases for Specification Mining - IEEE TSE 2012
Dallmeier, V., Knopp, N., Mallon, C., Fraser, G., Hack, S. and Zeller, A.
IEEE Transactions on Software Engineering, 38 (2): 243-257, 2012.
[doi]
[bib]
@ARTICLE{DKMFSZ:2012:TSE,
author = {Valentin Dallmeier and Nikolai Knopp and Christoph Mallon and Gordon Fraser and Sebastian Hack and Andreas Zeller},
title = {{A}utomatically {G}enerating {T}est {C}ases for {S}pecification {M}ining},
journal ={IEEE Transactions on Software Engineering},
booktitle_short ={IEEE TSE},
volume = {38},
number = {2},
issn = {0098-5589},
year = {2012},
pages = {243-257},
doi = {http://doi.ieeecomputersociety.org/10.1109/TSE.2011.105},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
- Optimal Register Allocation for SSA-form Programs in polynomial Time
Hack, S. and Goos, G.
Information Processing Letters, 98 (4): 150–155, 2006.
[doi]
[bib]
@ARTICLE{HG:2006:RA,
author = {Sebastian Hack and Gerhard Goos},
title = {{O}ptimal {R}egister {A}llocation for {SSA}-form {P}rograms in polynomial {T}ime},
journal = {Information Processing Letters},
year = {2006},
volume = {98},
pages = {150--155},
number = {4},
month = {May},
booktitle = {Information Processing Letters},
doi = {10.1016/j.ipl.2006.01.008},
publisher = {Elsevier}
}
- Temporal Resolution of the Human Primary Auditory Cortex in Gap Detection
Rupp, A., Gutschalk, A., Hack, S. and Scherg, M.
NeuroReport, 13 (17), 2002.
[url]
[bib]
@article{rupp_temporal_2002,
title = {{T}emporal {R}esolution of the {H}uman {P}rimary {A}uditory {C}ortex in {G}ap {D}etection},
volume = {13},
issn = {0959-4965},
url = {http://journals.lww.com/neuroreport/Fulltext/2002/12030/Temporal_resolution_of_the_human_primary_auditory.8.aspx},
abstract = {The temporal resolution of the primary auditory cortex was studied by recording the magnetic middle latency fields (MAEF) evoked by gaps of 3, 6 and 9 ms inserted in the middle of 600 ms broadband noise bursts. Spatio-temporal source modelling showed that a significant neural representation as reflected by MAEF responses is present at gap durations as low as 3 sms. The comparison of the MAEF waveforms elicited by the onset, gap and offset of the noise bursts indicates that the gap related response near threshold is largely determined by the onset to the burst following the gap. The electro-physiologically derived minimum detectable gap closely resembled the psychoacoustic threshold of 2.0 ms obtained in the same subjects.},
number = {17},
journal = {NeuroReport},
author = {Rupp, André and Gutschalk, Alexander and Hack, Sebastian and Scherg, Michael},
year = {2002},
keywords = {Auditory cortex, Auditory evoked fields, Magnetoencephalography, Psychoacoustics, Temporal processing}
}
- Fast Temporal interactions in Human Auditory Cortex
Rupp, A., Hack, S., Gutschalk, A., Schneider, P., Picton, T. W., Stippich, C. and Scherg, M.
NeuroReport, 11 (17), 2000.
[url]
[bib]
@article{rupp_fast_2000,
title = {{F}ast {T}emporal {i}nteractions in {H}uman {A}uditory {C}ortex},
volume = {11},
issn = {0959-4965},
url = {http://journals.lww.com/neuroreport/Fulltext/2000/11270/Fast_temporal_interactions_in_human_auditory.28.aspx},
abstract = {The temporal resolution of the human primary auditory cortex (AC) was studied using middle-latency evoked fields. Paired sounds with either the same or different spectral characteristics were presented with gaps between the sounds of 1, 4, 8 and 14 ms. Spatio-temporal modelling showed (1) that the response to the second sound was recognizable with gaps of 1 ms and rapidly increased in amplitude with increasing gap durations, (2) an enhanced N40m amplitude at gaps {\textgreater} 4 ms, (3) delayed N19m-P30m latencies when the stimuli were different. The median psychoacoustical thresholds were 1.6 ms for the same stimuli and 2.5 ms for different stimuli, confirming the electrophysiological evidence for rapid pattern-specific temporal processing in human primary auditory cortex.},
number = {17},
journal = {NeuroReport},
author = {Rupp, André and Hack, Sebastian and Gutschalk, Alexander and Schneider, Peter and Picton, Terence W. and Stippich, Christoph and Scherg, Michael},
year = {2000},
keywords = {Auditory cortex, Auditory evoked fields, Magnetoencephalography, Psychoacoustics, Temporal processing}
}
- Explainable Port Mapping Inference with Sparse Performance Counters for AMD's Zen Architectures
Ritter, F. and Hack, S.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pages 317–330, ACM, 2024.
[doi]
[url]
[bib]
@conference{Ritter:conf/asplos/0002H24,
author = {Ritter, Fabian and Hack, Sebastian},
editor = {Rajiv Gupta and Nael B. Abu{-}Ghazaleh and Madan Musuvathi and Dan Tsafrir},
title = {Explainable Port Mapping Inference with Sparse Performance Counters for AMD's Zen Architectures},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, {ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {317--330},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620666.3651363},
doi = {10.1145/3620666.3651363},
timestamp = {Sat, 04 May 2024 10:55:04 +0200},
biburl = {https://dblp.org/rec/conf/asplos/0002H24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
- AnICA: Analyzing Inconsistencies in Microarchitectural Code Analyzers
Ritter, F. and Hack, S.
Proceedings of the ACM on Programming Languages, Vol. 6, No. OOPSLA2, Association for Computing Machinery, 2022.
[doi]
[url]
[bib]
@conference{Ritter:OOPSLA22:10.1145/3563288,
author = {Ritter, Fabian and Hack, Sebastian},
title = {AnICA: Analyzing Inconsistencies in Microarchitectural Code Analyzers},
booktitle = {Proceedings of the ACM on Programming Languages, Vol. 6, No. OOPSLA2},
year = {2022},
issue_date = {October 2022},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {6},
number = {OOPSLA2},
url = {https://doi.org/10.1145/3563288},
doi = {10.1145/3563288},
journal = {Proc. ACM Program. Lang.},
month = {oct},
articleno = {125},
numpages = {29},
keywords = {Throughput Prediction, Abstraction, Differential Testing, Basic Blocks}
}
- An Abstract Interpretation for SPMD Divergence on Reducible Control Flow Graphs - POPL 2021
Rosemann, J., Moll, S. and Hack, S.
Principles of Programming Languages, 2021.
[url]
[bib]
@conference{RSH:popl21,
author = {Julian Rosemann and Simon Moll and Sebastian Hack},
title = {An Abstract Interpretation for SPMD Divergence on Reducible Control Flow Graphs},
year = 2021,
month = january,
url = {https://compilers.cs.uni-saarland.de/papers/uniana_preprint.pdf},
booktitle = {Principles of Programming Languages},
booktitle_short = {POPL},
}
- AnySeq: A High Performance Sequence Alignment Library based on Partial Evaluation - IPDPS 2020
Müller, A., Schmidt, B., Hildebrandt, A., Membarth, R., Kruse, M., Leißa, R. and Hack, S.
Proceedings of the 34th IEEE International Parallel \& Distributed Processing Symposium (IPDPS), pages 1–11, 2020.
[pdf]
[bib]
@conference{mueller2020anyseq,
author = {Müller, André and Schmidt, Bertil and Hildebrandt, Andreas and Membarth, Richard and Kruse, Matthis and Leißa, Roland and Hack, Sebastian},
address = {New Orleans, LA, USA},
booktitle = {Proceedings of the 34th IEEE International Parallel \& Distributed Processing Symposium (IPDPS)},
booktitle_short = {IPDPS},
title = {{AnySeq}: A High Performance Sequence Alignment Library based on Partial Evaluation},
pages = {1--11},
year = 2020,
month = may,
date = {2020-05-18/2020-05-22},
doi = {},
organization = {IEEE},
webpdf = {https://arxiv.org/pdf/2002.04561.pdf},
}
- PMEvo: Portable Inference of Port Mappings for Out-of-Order Processors by Evolutionary Optimization - PLDI 2020
Ritter, F. and Hack, S.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, PLDI 2020, London, UK, June 15-20, 2020, pages 608–622, ACM, 2020.
[doi]
[url]
[pdf]
[bib]
@conference{DBLP:conf/pldi/0002H20,
author = {Fabian Ritter and Sebastian Hack},
editor = {Alastair F. Donaldson and Emina Torlak},
title = {{PMEvo}: Portable Inference of Port Mappings for Out-of-Order Processors by Evolutionary Optimization},
booktitle = {Proceedings of the 41st {ACM} {SIGPLAN} International Conference on Programming Language Design and Implementation, {PLDI} 2020, London, UK, June 15-20, 2020},
pages = {608--622},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3385412.3385995},
doi = {10.1145/3385412.3385995},
timestamp = {Tue, 09 Jun 2020 13:52:54 +0200},
biburl = {https://dblp.org/rec/conf/pldi/0002H20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org},
webpdf = {https://compilers.cs.uni-saarland.de/papers/ritter_pmevo_pldi20.pdf},
booktitle_short = {PLDI},
}
- Polyhedral Expression Propagation - CC 2018
Doerfert, J., Sharma, S. and Hack, S.
Proceedings of the 27th International Conference on Compiler Construction, 2018.
[url]
[pdf]
[bib]
@conference{doerfert2018expressionprop,
author = {Doerfert, Johannes and Sharma, Shrey and Hack, Sebastian},
title = {{P}olyhedral {E}xpression {P}ropagation},
booktitle = {Proceedings of the 27th International Conference on Compiler Construction},
series = {CC 2018},
booktitle_short = {CC},
year = {2018},
numpages = {12},
keywords = {polyhedral model, scalar removal, dependence removal, temporary memory elimination, recurrences},
url={http://compilers.cs.uni-saarland.de/papers/doerfert_expr_prop.pdf},
webpdf={http://compilers.cs.uni-saarland.de/papers/doerfert_expr_prop.pdf},
}
- Partial Control-flow Linearization - PLDI 2018
Moll, S. and Hack, S.
Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation, pages 543–556, ACM, 2018.
[doi]
[url]
[pdf]
[bib]
@conference{MH:PLDI18,
author = {Moll, Simon and Hack, Sebastian},
title = {{P}artial {C}ontrol-flow {L}inearization},
booktitle = {Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation},
series = {PLDI 2018},
booktitle_short = {PLDI},
year = {2018},
isbn = {978-1-4503-5698-5},
location = {Philadelphia, PA, USA},
pages = {543--556},
numpages = {14},
url = {http://doi.acm.org/10.1145/3192366.3192413},
doi = {10.1145/3192366.3192413},
acmid = {3192413},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Compiler optimizations, SIMD, SPMD},
webpdf={http://compilers.cs.uni-saarland.de/papers/moll_parlin_pldi18.pdf},
}
- AnyDSL: a partial evaluation framework for programming high-performance libraries - OOPSLA 2018
Leißa, R., Boesche, K., Hack, S., Pérard-Gayot, A., Membarth, R., Slusallek, P., Müller, A. and Schmidt, B.
International Conference on Object Oriented Programming Systems, Languages and Applications, pages 119:1–119:30, 2018.
[doi]
[url]
[pdf]
[bib]
@conference{DBLP:journals/pacmpl/LeissaBHPMSMS18,
author = {Roland Lei{\ss}a and Klaas Boesche and Sebastian Hack and Arsène Pérard-Gayot and Richard Membarth and Philipp Slusallek and André Müller and Bertil Schmidt},
title = {AnyDSL: a partial evaluation framework for programming high-performance libraries},
booktitle = {International Conference on Object Oriented Programming Systems, Languages and Applications},
booktitle_short = {OOPSLA},
journal = {{PACMPL}},
volume = {2},
number = {{OOPSLA}},
pages = {119:1--119:30},
year = {2018},
url = {http://doi.acm.org/10.1145/3276489},
doi = {10.1145/3276489},
timestamp = {Fri, 26 Oct 2018 16:39:22 +0200},
biburl = {https://dblp.org/rec/bib/journals/pacmpl/LeissaBHPMSMS18},
bibsource = {dblp computer science bibliography, https://dblp.org},
webpdf = {http://compilers.cs.uni-saarland.de/papers/anydsl.pdf}
}
- Daisy - Framework for Analysis and Optimization of Numerical Programs (Tool Paper)
Darulova, E., Izycheva, A., Nasir, F., Ritter, F., Becker, H. and Bastian, R.
Tools and Algorithms for the Construction and Analysis of Systems - 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part I, pages 270–287, 2018.
[doi]
[url]
[bib]
@conference{DBLP:conf/tacas/DarulovaINRBB18,
author = {Eva Darulova and Anastasiia Izycheva and Fariha Nasir and Fabian Ritter and Heiko Becker and Robert Bastian},
title = {Daisy - Framework for Analysis and Optimization of Numerical Programs (Tool Paper)},
booktitle = {Tools and Algorithms for the Construction and Analysis of Systems - 24th International Conference, {TACAS} 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, {ETAPS} 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part {I}},
pages = {270--287},
year = {2018},
crossref = {DBLP:conf/tacas/2018-1},
url = {https://doi.org/10.1007/978-3-319-89960-2\_15},
doi = {10.1007/978-3-319-89960-2\_15},
timestamp = {Tue, 14 May 2019 10:00:53 +0200},
biburl = {https://dblp.org/rec/bib/conf/tacas/DarulovaINRBB18},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
- Optimistic loop optimization - CGO 2017
Doerfert, J., Grosser, T. and Hack, S.
International Symposium on Code Generation and Optimization, pages 292–304, 2017.
[url]
[pdf]
[bib]
@conference{doerfert2017optimistic,
title={Optimistic loop optimization},
author={Doerfert, Johannes and Grosser, Tobias and Hack, Sebastian},
booktitle={International Symposium on Code Generation and Optimization},
booktitle_short={CGO},
pages={292--304},
year={2017},
organization={IEEE},
url={http://compilers.cs.uni-saarland.de/papers/doerfert_cgo17.pdf},
webpdf={http://compilers.cs.uni-saarland.de/papers/doerfert_cgo17.pdf},
}
- RaTrace: simple and efficient abstractions for BVH ray traversal algorithms - GPCE 2017
Pérard-Gayot, A., Weier, M., Membarth, R., Slusallek, P., Leißa, R. and Hack, S.
Proceedings of the 16th ACM SIGPLAN International Conference on Generative Programming: Concepts and Experiences, GPCE 2017, Vancouver, BC, Canada, October 23-24, 2017, pages 157–168, 2017.
[doi]
[url]
[bib]
@conference{DBLP:conf/gpce/Perard-GayotWMS17,
author = {Arsène Pérard-Gayot and Martin Weier and Richard Membarth and Philipp Slusallek and Roland Lei{\ss}a and Sebastian Hack},
title = {RaTrace: simple and efficient abstractions for {BVH} ray traversal algorithms},
booktitle = {Proceedings of the 16th {ACM} {SIGPLAN} International Conference on Generative Programming: Concepts and Experiences, {GPCE} 2017, Vancouver, BC, Canada, October 23-24, 2017},
booktitle_short = {GPCE},
pages = {157--168},
year = {2017},
url = {http://doi.acm.org/10.1145/3136040.3136044},
doi = {10.1145/3136040.3136044},
timestamp = {Mon, 30 Oct 2017 18:48:34 +0100},
biburl = {http://dblp.org/rec/bib/conf/gpce/Perard-GayotWMS17},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
- Verified Spilling and Translation Validation with Repair
Rosemann, J., Schneider, S. and Hack, S.
Interactive Theorem Proving - 8th International Conference, ITP
2017, Brasilia, Brazil, September 26-29, 2017, Proceedings, pages 427–443, Springer, 2017.
[doi]
[url]
[bib]
@conference{DBLP:conf/itp/RosemannSH17,
author = {Julian Rosemann and Sigurd Schneider and Sebastian Hack},
editor = {Mauricio Ayala{-}Rinc{\'{o}}n and
C{\'{e}}sar A. Mu{\~{n}}oz},
title = {Verified Spilling and Translation Validation with Repair},
booktitle = {Interactive Theorem Proving - 8th International Conference, {ITP}
2017, Brasilia, Brazil, September 26-29, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10499},
pages = {427--443},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-66107-0},
doi = {10.1007/978-3-319-66107-0},
timestamp = {Tue, 14 May 2019 10:00:37 +0200},
biburl = {https://dblp.org/rec/conf/itp/RosemannSH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
- Enabling Compositionality for Multicore Timing Analysis
Hahn, S., Jacobs, M. and Reineke, J.
Proceedings of the 24th International Conference on Real Time Networks and Systems, pages 299–308, ACM, 2016.
[doi]
[url]
[bib]
@CONFERENCE{HJR:2016,
author = {Hahn, Sebastian and Jacobs, Michael and Reineke, Jan},
title = {Enabling Compositionality for Multicore Timing Analysis},
booktitle = {Proceedings of the 24th International Conference on Real Time Networks and Systems},
series = {RTNS '16},
year = {2016},
isbn = {978-1-4503-4787-7},
location = {Brest, France},
pages = {299--308},
numpages = {10},
url = {http://doi.acm.org/10.1145/2997465.2997471},
doi = {10.1145/2997465.2997471},
acmid = {2997471},
publisher = {ACM},
address = {New York, NY, USA},
}
- A Framework for the Derivation of WCET Analyses for Multi-Core Processors
Jacobs, M., Hahn, S. and Hack, S.
Proceedings of the 28th Euromicro Conference on Real-Time Systems, pages 141-151, 2016.
[doi]
[bib]
@CONFERENCE{ECRTS_2016_Jacobs_Hahn_Hack,
author={Jacobs, Michael and Hahn, Sebastian and Hack, Sebastian},
booktitle={Proceedings of the 28th Euromicro Conference on Real-Time Systems},
booktitke_short={ECRTS},
title={A Framework for the Derivation of {WCET} Analyses for Multi-Core Processors},
year={2016},
pages={141-151},
doi={10.1109/ECRTS.2016.19},
ISSN={1068-3070},
month={July},
}
- Input Space Splitting for OpenCL - CC 2016
Moll, S., Doerfert, J. and Hack, S.
Proceedings of the 25th International Conference on Compiler Construction, pages 251–260, ACM, 2016.
[doi]
[url]
[pdf]
[bib]
@Conference{MDH:2016:pollocl,
author = {Moll, Simon and Doerfert, Johannes and Hack, Sebastian},
title = {{I}nput {S}pace {S}plitting for {O}pen{CL}},
booktitle = {Proceedings of the 25th International Conference on Compiler Construction},
series = {CC 2016},
booktitle_short = {CC},
year = {2016},
isbn = {978-1-4503-4241-4},
location = {Barcelona, Spain},
pages = {251--260},
numpages = {10},
url = {http://doi.acm.org/10.1145/2892208.2892217},
doi = {10.1145/2892208.2892217},
acmid = {2892217},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Divergence, OpenCL, Polyhedral Representation, SPMD, Vectorization},
webpdf={http://compilers.cs.uni-saarland.de/papers/moll_pollocl.pdf}
}
- Thread-level Speculation with Kernel Support - CC 2016
Hammacher, C., Streit, K., Zeller, A. and Hack, S.
Proceedings of the 25th International Conference on Compiler Construction, pages 1–11, ACM, 2016.
[doi]
[url]
[pdf]
[bib]
@Conference{HSZH:2016:TLSK,
author = {Hammacher, Clemens and Streit, Kevin and Zeller, Andreas and Hack, Sebastian},
title = {{T}hread-level {S}peculation with {K}ernel {S}upport},
booktitle = {Proceedings of the 25th International Conference on Compiler Construction},
series = {CC 2016},
booktitle_short = {CC},
year = {2016},
isbn = {978-1-4503-4241-4},
location = {Barcelona, Spain},
pages = {1--11},
numpages = {11},
url = {http://doi.acm.org/10.1145/2892208.2892221},
doi = {10.1145/2892208.2892221},
acmid = {2892221},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {kernel module, shared memory, speculative parallelization, thread-level speculation, virtual memory},
webpdf={http://compilers.cs.uni-saarland.de/papers/hammacher_cc16-p1.pdf}
}
- WCET Analysis for Multi-core Processors with Shared Buses and Event-driven Bus Arbitration - RTNS 2015
Jacobs, M., Hahn, S. and Hack, S.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, pages 193–202, ACM, 2015.
[doi]
[url]
[bib]
@CONFERENCE{JHH:2015,
author = {Jacobs, Michael and Hahn, Sebastian and Hack, Sebastian},
title = {{WCET} Analysis for Multi-core Processors with Shared Buses and Event-driven Bus Arbitration},
booktitle = {Proceedings of the 23rd International Conference on Real Time Networks and Systems},
booktitle_short = {RTNS},
series = {RTNS '15},
year = {2015},
isbn = {978-1-4503-3591-1},
location = {Lille, France},
pages = {193--202},
numpages = {10},
url = {http://doi.acm.org/10.1145/2834848.2834872},
doi = {10.1145/2834848.2834872},
acmid = {2834872},
publisher = {ACM},
address = {New York, NY, USA},
}
- A Linear First-Order Functional Intermediate Language for Verified Compilers - ITP 2015
Schneider, S., Smolka, G. and Hack, S.
6th International Conference on Interactive Theorem Proving, pages 344–358, 2015.
[doi]
[url]
[pdf]
[bib]
@conference{SSH:2015:ILF,
author = {Sigurd Schneider and Gert Smolka and Sebastian Hack},
title = {A Linear First-Order Functional Intermediate Language for Verified Compilers},
booktitle = {6th International Conference on Interactive Theorem Proving},
booktitle_short = {ITP},
pages = {344--358},
year = {2015},
url = {http://dx.doi.org/10.1007/978-3-319-22102-1_23},
doi = {10.1007/978-3-319-22102-1_23},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/itp/SchneiderSH15},
webpdf = {https://www.ps.uni-saarland.de/Publications/documents/Linear-IL-Assignment_2015.pdf},
}
- A Graph-Based Higher-Order Intermediate Representation - CGO 2015
(2nd place: Artifact Evaluation for CGO/PPoPP'15)
Leißa, R., Köster, M. and Hack, S.
International Symposium on Code Generation and Optimization, 2015.
[doi]
[url]
[pdf]
[bib]
@CONFERENCE{LKH:2015,
author = {Roland Lei{\ss}a and Marcel K{\"o}ster and Sebastian Hack},
title = {A {G}raph-{B}ased {H}igher-{O}rder {I}ntermediate {R}epresentation},
booktitle = {International Symposium on Code Generation and Optimization},
booktitle_short = {CGO},
year = {2015},
url = {http://www.cdl.uni-saarland.de/artifacts/cgo2015.php},
webpdf = {http://www.cdl.uni-saarland.de/papers/lkh15_cgo.pdf},
doi = {10.1109/CGO.2015.7054200},
award = {2nd place: Artifact Evaluation for CGO/PPoPP'15},
acc_rate = {28.4},
accepted = {25},
submitted = {88},
}
- Learning how to Prevent Return-Oriented Programming Efficiently - ESSoS 2015
Pfaff, D., Hack, S. and Hammer, C.
International Symposium on Engineering Secure Software and Systems, pages 68–85, Springer, 2015.
[bib]
@conference{pfaff15ESSoS,
Author = {David Pfaff and Sebastian Hack and Christian Hammer},
Booktitle = {International Symposium on Engineering Secure Software and Systems},
booktitle_short = {ESSoS},
Date-Added = {2014-11-17 08:02:44 +0000},
Date-Modified = {2014-12-24 07:55:28 +0000},
Editor = {Frank Piessens and Juan Caballero and Nataliia Bielova},
Pages = {68--85},
Publisher = {Springer},
Series = {LNCS},
Title = {{L}earning how to {P}revent {R}eturn-{O}riented {P}rogramming {E}fficiently},
Volume = {8978},
Year = {2015},
}
- Shallow Embedding of DSLs via Online Partial Evaluation - GPCE 2015
(Best Paper Award)
Leißa, R., Boesche, K., Hack, S., Membarth, R. and Slusallek, P.
Proceedings of the 2015 International Conference on Generative Programming: Concepts and Experiences, 2015.
[doi]
[pdf]
[bib]
@CONFERENCE{LBHMS:2015,
author = {Roland Lei{\ss}a and Klaas Boesche and Sebastian Hack and Richard Membarth and Philipp Slusallek},
title = {Shallow Embedding of {DSLs} via Online Partial Evaluation},
booktitle = {Proceedings of the 2015 International Conference on Generative Programming: Concepts and Experiences},
doi = {10.1145/2814204.2814208},
booktitle_short = {GPCE},
webpdf = {http://www.cdl.uni-saarland.de/papers/gpce15.pdf},
award = {Best Paper Award},
year = {2015},
}
- Runtime Pointer Disambiguation - OOPSLA 2015
Alves, R., Gruber, F., Doerfert, J., Labrineas, A., Grosser, T., Rastello, F. and Pereira, F. M. Q.
International Conference on Object Oriented Programming Systems, Languages and Applications, 2015.
[url]
[pdf]
[bib]
@conference{Alves15OOPSLA,
author = {Rafael Alves and Fabian Gruber and Johannes Doerfert and Alexandros Labrineas and Tobias Grosser and Fabrice Rastello and Fernando Magno Quintão Pereira},
title = {{R}untime {P}ointer {D}isambiguation},
booktitle = {International Conference on Object Oriented Programming Systems, Languages and Applications},
booktitle_short = {OOPSLA},
year = {2015},
url = {http://homepages.dcc.ufmg.br/~fernando/publications/papers/OOPSLA15.pdf},
webpdf = {http://homepages.dcc.ufmg.br/~fernando/publications/papers/OOPSLA15.pdf},
}
- Bounds Check Hoisting for AddressSanitizer
Moll, S., Nazaré, H., Machado, G. V. and Rodrigues, R. E.
Proceedings of the 18th Brazilian Symposium on Programming Languages, SBLP 2014, Maceio, Brazil., pages 47–61, Springer International Publishing, 2014.
[doi]
[url]
[bib]
@Conference{Moll:2014:fasan,
author = {Moll, Simon and Nazar{\'e}, Henrique and Machado, Gustavo Vieira and Rodrigues, Raphael Ernani},
title = {{B}ounds {C}heck {H}oisting for {A}ddress{S}anitizer},
booktitle = {Proceedings of the 18th Brazilian Symposium on Programming Languages, SBLP 2014, Maceio, Brazil.},
series = {LNCS},
volume = {8771},
year = {2014},
publisher = {Springer International Publishing},
pages = {47--61},
isbn = {978-3-319-11863-5},
doi = {10.1007/978-3-319-11863-5_4},
url = {http://dx.doi.org/10.1007/978-3-319-11863-5_4}
}
- Architecture-Parametric Timing Analysis
Reineke, J. and Doerfert, J.
RTAS, 2014.
[url]
[bib]
@CONFERENCE{Reineke14,
author = {Jan Reineke and Johannes Doerfert},
title = {Architecture-Parametric Timing Analysis},
booktitle = {RTAS},
year = {2014},
month = {April},
url = {http://embedded.cs.uni-saarland.de/publications/ArchitectureParametricTimingAnalysis-RTAS2014.pdf}
}
- Specialization through Dynamic Staging - GPCE 2014
Danilewski, P., Köster, M., Leißa, R., Membarth, R. and Slusallek, P.
Proceedings of the 2014 International Conference on Generative Programming: Concepts and Experiences, pages 103–112, ACM, 2014.
[doi]
[pdf]
[bib]
@CONFERENCE{DKLMS:2014,
author = {Piotr Danilewski and Marcel K{\"o}ster and Roland Lei{\ss}a and Richard Membarth and Philipp Slusallek},
title = {Specialization through Dynamic Staging},
booktitle = {Proceedings of the 2014 International Conference on Generative Programming: Concepts and Experiences},
booktitle_short = {GPCE},
year = {2014},
location = {V\&\#228;ster\&\#229;s, Sweden},
doi = {10.1145/2658761.2658774},
isbn = {978-1-4503-3161-6},
pages = {103--112},
webpdf = {http://www.cdl.uni-saarland.de/papers/gpce14.pdf},
numpages = {10},
acmid = {2658774},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Dynamic staging, code specialization, partial evaluation},
}
- Presburger Arithmetic in Memory Access Optimization for Data-Parallel Languages - FroCoS 2013 2013
Karrenberg, R., Kosta, M. and Sturm, T.
Frontiers of Combining Systems, 2013.
[bib]
@CONFERENCE{KKS:2013:frocos,
author = {Ralf Karrenberg and Marek Kosta and Thomas Sturm},
title = {Presburger Arithmetic in Memory Access Optimization for Data-Parallel Languages},
booktitle = {Frontiers of Combining Systems},
booktitle_short = {FroCoS 2013},
year = {2013},
}
- Simple and Efficient Construction of Static Single Assignment Form - CC 2013
Braun, M., Buchwald, S., Hack, S., Leißa, R., Mallon, C. and Zwinkau, A.
Compiler Construction, pages 102-122, Springer Berlin Heidelberg, 2013.
[doi]
[url]
[pdf]
[bib]
@conference{BBHLMZ:2013:ssa,
title = {{S}imple and {E}fficient {C}onstruction of {S}tatic {S}ingle {A}ssignment {F}orm},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2013},
publisher = {Springer Berlin Heidelberg},
volume = {7791},
pages = {102-122},
author = {Matthias Braun and Sebastian Buchwald and Sebastian Hack and Roland Lei{\ss}a and Christoph Mallon and Andreas Zwinkau},
editor = {Jhala, Ranjit and Bosschere, Koen},
series = {Lecture Notes in Computer Science},
url = {http://www.cdl.uni-saarland.de/projects/ssaconstr},
webpdf = {http://www.cdl.uni-saarland.de/papers/bbhlmz13cc.pdf},
doi = {10.1007/978-3-642-37051-9_6},
}
- Impact of Resource Sharing on Performance and Performance Prediction: A Survey
Abel, A., Benz, F., Doerfert, J., Dörr, B., Hahn, S., Haupenthal, F., Jacobs, M., Moin, A. H., Reineke, J., Schommer, B. and Wilhelm, R.
[doi]
[pdf]
[bib]
@CONFERENCE{AbelBDDHHJMRSW:2013:ResSharing,
author = {Andreas Abel and Florian Benz and Johannes Doerfert and Barbara D{\"o}rr and Sebastian Hahn and Florian Haupenthal and Michael Jacobs and Amir H. Moin and Jan Reineke and Bernhard Schommer and Reinhard Wilhelm},
title = {Impact of Resource Sharing on Performance and Performance Prediction: A Survey},
series = {CONCUR},
year = {2013},
pages = {25-43},
ee = {http://dx.doi.org/10.1007/978-3-642-40184-8_3},
crossref = {DBLP:conf/concur/2013},
doi = {10.1007/978-3-642-40184-8_3},
bibsource = {DBLP, http://dblp.uni-trier.de},
webpdf = {http://embedded.cs.uni-saarland.de/publications/ResourceSharingSurvey.pdf},
abstract = {
Multi-core processors are increasingly considered as execution platforms for
embedded systems because of their good performance/ energy ratio. However,
the interference on shared resources poses several problems. It may severely
reduce the performance of tasks executed on the cores, and it increases the
complexity of timing analysis and/or decreases the precision of its results.
In this paper, we survey recent work on the impact of shared buses, caches,
and other resources on performance and performance prediction.
},
}
- Hardware Acceleration for Programs in SSA Form - CASES 2013
Mohr, M., Grudnitsky, A., Modschiedler, T., Bauer, L., Hack, S. and Henkel, J.
Conference on Compilers, Architecture and Synthesis for Embedded Systems, pages 1–10, 2013.
[doi]
[url]
[bib]
@conference{MohrGMBHH13,
author = {Manuel Mohr and Artjom Grudnitsky and Tobias Modschiedler and Lars Bauer and Sebastian Hack and J{\"{o}}rg Henkel},
title = {Hardware {A}cceleration for {P}rograms in {SSA} {F}orm},
booktitle = {Conference on Compilers, Architecture and Synthesis for Embedded Systems},
booktitle_short = {CASES},
year = {2013},
pages = {1--10},
url = {http://dx.doi.org/10.1109/CASES.2013.6662518},
doi = {10.1109/CASES.2013.6662518},
timestamp = {Thu, 18 Sep 2014 06:15:17 +0200},
biburl = {http://dblp.uni-trier.de/rec/bib/conf/cases/MohrGMBHH13},
bibsource = {dblp computer science bibliography, http://dblp.org}
}
- A Dynamic Program Analysis to find Floating-Point Accuracy Problems - PLDI 2012
Benz, F., Hildebrandt, A. and Hack, S.
Conference on Programming Language Design and Implementation, 2012.
[url]
[bib]
@CONFERENCE{BHH:2012:fp,
author = {Florian Benz and Andreas Hildebrandt and Sebastian Hack},
title = {{A} {D}ynamic {P}rogram {A}nalysis to find {F}loating-{P}oint {A}ccuracy {P}roblems},
booktitle = {Conference on Programming Language Design and Implementation},
booktitle_short = {PLDI},
year = {2012},
acc_rate = {18.8},
accepted = {48},
submitted = {255},
url = {http://www.cdl.uni-saarland.de/papers/benz_fp.pdf}
}
- Sambamba: A Runtime System for Online Adaptive Parallelization - CC 2012
Streit, K., Hammacher, C., Zeller, A. and Hack, S.
Compiler Construction, 2012.
[url]
[bib]
@CONFERENCE{SHZH:2012:sambamba,
author = {Kevin Streit and Clemens Hammacher and Andreas Zeller and Sebastian Hack},
title = {Sambamba: A Runtime System for Online Adaptive Parallelization},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2012},
url = {http://www.cdl.uni-saarland.de/papers/streit_sambamba.pdf}
}
- Improving Performance of OpenCL on CPUs - CC 2012
Karrenberg, R. and Hack, S.
Compiler Construction, 2012.
[url]
[bib]
@CONFERENCE{KH:2012:opencl,
author = {Ralf Karrenberg and Sebastian Hack},
title = {Improving Performance of OpenCL on CPUs},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2012},
url = {http://www.cdl.uni-saarland.de/papers/karrenberg_opencl.pdf}
}
- Extending a C-like Language for Portable SIMD Programming - PPoPP 2012
Leißa, R., Hack, S. and Wald, I.
Principles and Practice of Parallel Programming, 2012.
[doi]
[pdf]
[bib]
@CONFERENCE{LHW:2012:vecimp,
author = {Roland Lei{\ss}a and Sebastian Hack and Ingo Wald},
title = {{E}xtending a {C}-like {L}anguage for {P}ortable {SIMD} {P}rogramming},
booktitle = {Principles and Practice of Parallel Programming},
booktitle_short = {PPoPP},
year = {2012},
doi = {10.1145/2145816.2145825},
acc_rate = {14.9},
accepted = {26},
submitted = {175},
webpdf = {http://www.cdl.uni-saarland.de/papers/leissa_vecimp.pdf},
}
- Graph-Coloring and Treescan Register Allocation using Repairing - CASES 2011
Colombet, Q., Boissinot, B., Brisk, P., Hack, S. and Rastello, F.
Conference on Compilers, architectures and synthesis for embedded systems, pages 45–54, ACM, 2011.
[doi]
[bib]
@conference{Colombet:2011:GTR,
author = {Colombet, Quentin and Boissinot, Benoit and Brisk, Philip and Hack, Sebastian and Rastello, Fabrice},
title = {Graph-{C}oloring and {T}reescan {R}egister {A}llocation using {R}epairing},
booktitle = {Conference on Compilers, architectures and synthesis for embedded systems},
booktitle_short = {CASES},
year = {2011},
isbn = {978-1-4503-0713-0},
location = {Taipei, Taiwan},
pages = {45--54},
numpages = {10},
doi = {10.1145/2038698.2038708},
acmid = {2038708},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {coalescing, coloring, fast register allocation, register constraints, ssa form},
}
- Whole Function Vectorization
Karrenberg, R. and Hack, S.
International Symposium on Code Generation and Optimization, 2011.
[doi]
[url]
[slides]
[bib]
@CONFERENCE{KH:2011:cgo,
author = {Ralf Karrenberg and Sebastian Hack},
title = {{W}hole {F}unction {V}ectorization},
booktitle = {International Symposium on Code Generation and Optimization},
series = {CGO},
year = {2011},
doi = {10.1109/CGO.2011.5764682},
abstract = {
Abstract—Data-parallel programming languages are an important component
in today's parallel computing landscape. Among those are domain-
specific languages like shading languages in graphics (HLSL, GLSL,
RenderMan, etc.) and "general-purpose" languages like CUDA or OpenCL.
Current implementations of those languages on CPUs solely rely on multi-
threading to implement parallelism and ignore the additional intra-core
parallelism provided by the SIMD instruction set of those processors
(like Intel's SSE and the upcoming AVX or Larrabee instruction sets).
In this paper, we discuss several aspects of implementing data-parallel
languages on machines with SIMD instruction sets. Our main contribution
is a language- and platform-independent code transformation that
performs whole-function vectorization on low-level intermediate code
given by a control flow graph in SSA form.
We evaluate our technique in two scenarios: First, incorporated in a
compiler for a domain-specific language used in real-time ray tracing.
Second, in a stand-alone OpenCL driver. We observe average speedup
factors of 3.9 for the ray tracer and factors between 0.6 and 5.2 for
different OpenCL kernels.
},
webslides = {http://www.cdl.uni-saarland.de/projects/wfv/wfv_cgo11_slides.pdf},
url = {http://www.cdl.uni-saarland.de/papers/karrenberg_wfv.pdf},
acc_rate = {26.7},
accepted = {28},
submitted = {105},
}
- AnySL: Efficient and Portable Shading for Ray Tracing - HPG 2010
Karrenberg, R., Rubinstein, D., Slusallek, P. and Hack, S.
Proceedings of the Conference on High Performance Graphics, pages 97–105, Eurographics Association, 2010.
[url]
[slides]
[bib]
@CONFERENCE{KRSH:2010:hpg,
author = {Ralf Karrenberg and Dmitri Rubinstein and Philipp Slusallek and Sebastian Hack},
title = {{AnySL: Efficient and Portable Shading for Ray Tracing}},
booktitle = {Proceedings of the Conference on High Performance Graphics},
series = {HPG '10},
year = {2010},
location = {Saarbrucken, Germany},
pages = {97--105},
numpages = {9},
url = {http://portal.acm.org/citation.cfm?id=1921479.1921495},
acmid = {1921495},
publisher = {Eurographics Association},
address = {Aire-la-Ville, Switzerland, Switzerland},
booktitle_short = {HPG},
abstract = {
While a number of different shading languages have been developed,
their efficient integration into an existing renderer is notoriously
difficult, often boiling down to implementing an entire compiler
toolchain for each language. Furthermore, no shading language is
broadly supported across the variety of rendering systems.
AnySL attacks this issue from multiple directions: We compile shaders
from different languages into a common, portable representation, which
uses subroutine threaded code: Every language operator is translated to
a function call. Thus, the compiled shader is generic with respect to
the used types and operators.
The key component of our system is an embedded compiler that
instantiates this generic code in terms of the renderer's native types
and operations. It allows for flexible code transformations to match
the internal structure of the renderer and eliminates all overhead due
to the subroutine threaded code. For SIMD architectures we
automatically perform vectorization of scalar shaders which speeds up
rendering by a factor of 3.9 on average on SSE. The results are highly
optimized, parallel shaders that operate directly on the internal data
structures of a renderer. We show that both traditional shading
languages such as RenderMan, but also C/C++-based shading languages,
can be fully supported and deliver high performance across different
CPU renderers.
},
webslides = {http://www.cdl.uni-saarland.de/projects/anysl/anysl_hpg10_slides.pdf}
}
- Preference-Guided Register Assignment - CC 2010
Braun, M., Mallon, C. and Hack, S.
Compiler Construction, pages 205–223, Springer, 2010.
[doi]
[bib]
@CONFERENCE{BMH:2010:Preference,
author = {Matthias Braun and Christoph Mallon and Sebastian Hack},
title = {{P}reference-{G}uided {R}egister {A}ssignment},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2010},
isbn = {978-3-642-11969-9},
pages = {205--223},
publisher = {Springer},
location = {Paphos, Cyprus},
volume = {6011},
series = {Lecture Notes In Computer Science},
doi = {10.1007/978-3-642-11970-5},
}
- Generating Test Cases for Specification Mining - ISSTA 2010
Dallmeier, V., Knopp, N., Mallon, C., Hack, S. and Zeller, A.
International Symposium on Software Testing and Analysis, pages 85–96, ACM, 2010.
[doi]
[bib]
@CONFERENCE{DKMHZ:2010:issta,
author = {Valentin Dallmeier and Nikolai Knopp and Christoph Mallon and Sebastian Hack and Andreas Zeller},
title = {{G}enerating {T}est {C}ases {f}or {S}pecification {M}ining},
year = {2010},
booktitle = {International Symposium on Software Testing and Analysis},
booktitle_short = {ISSTA},
isbn = {978-1-60558-823-0},
location = {Trento, Italy},
pages = {85--96},
numpages = {12},
doi = {10.1145/1831708.1831719},
acmid = {1831719},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {specification mining, test case generation, typestate analysis},
}
- Register Spilling and Live-Range Splitting for SSA-Form
Programs - CC 2009
Braun, M. and Hack, S.
Compiler Construction, pages 174–189, Springer, 2009.
[doi]
[bib]
@CONFERENCE{BH:2009:Spill,
author = {Matthias Braun and Sebastian Hack},
title = {{R}egister {S}pilling and {L}ive-{R}ange {S}plitting for {SSA}-{F}orm
{P}rograms},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2009},
volume = {5501},
series = {Lecture Notes In Computer Science},
pages = {174--189},
publisher = {Springer},
doi = {10.1007/978-3-642-00722-4_13},
location = {York, England}
}
- Fast Liveness Checking for SSA-Form Programs - CGO 2008
(Best Paper Award)
Boissinot, B., Hack, S., Grund, D., Dupont-De-Dinechin, B. and Rastello, F.
International Symposium on Code Generation and Optimization, pages 35–44, ACM, 2008.
[doi]
[bib]
@CONFERENCE{BHGDR:2007:SSALiveness,
author = {Benoit Boissinot and Sebastian Hack and Daniel Grund and Beno{\^i}t Dupont-De-Dinechin and Fabrice Rastello},
title = {{F}ast {L}iveness {C}hecking for {SSA}-{F}orm {P}rograms},
booktitle = {International Symposium on Code Generation and Optimization},
booktitle_short = {CGO},
year = {2008},
pages = {35--44},
address = {New York, NY, USA},
publisher = {ACM},
award = {Best Paper Award},
doi = {10.1145/1356058.1356064},
isbn = {978-1-59593-978-4},
location = {Boston, MA, USA}
}
- Register Coalescing by Graph Recoloring - PLDI 2008
Hack, S. and Goos, G.
Conference on Programming Language Design and Implementation, pages 227–237, ACM, 2008.
[doi]
[bib]
@CONFERENCE{HG:2008:Recolor,
author = {Sebastian Hack and Gerhard Goos},
title = {{R}egister {C}oalescing by {G}raph {R}ecoloring},
booktitle = {Conference on Programming Language Design and Implementation},
booktitle_short = {PLDI},
year = {2008},
pages = {227--237},
address = {New York, NY, USA},
publisher = {ACM},
doi = {10.1145/1375581.1375610},
isbn = {978-1-59593-860-2},
location = {Tucson, AZ, USA}
}
- A Fast Cutting-Plane Algorithm for Optimal Coalescing - CC 2007
(Best Paper Award)
Grund, D. and Hack, S.
Compiler Construction, pages 111–125, Springer, 2007.
[doi]
[bib]
@CONFERENCE{GH:2007:Coal,
author = {Daniel Grund and Sebastian Hack},
title = {A {F}ast {C}utting-{P}lane {A}lgorithm for {O}ptimal {C}oalescing},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2007},
editor = {Shriram Krishnamurthi and Martin Odersky},
volume = {4420},
series = {Lecture Notes In Computer Science},
pages = {111--125},
month = {March},
publisher = {Springer},
award = {Best Paper Award},
doi = {10.1007/978-3-540-71229-9_8},
location = {Braga, Portugal}
}
- GrGen: A Fast SPO-based Graph Rewriting Tool - ICGT 2006
Geiß, R., Batz, G. V., Grund, D., Hack, S. and Szalkowski, A. M.
International Conference on Graph Transformation, pages 383–397, Springer, 2006.
[pdf]
[bib]
@CONFERENCE{GBGHS:2006:GrGen,
author = {Rubino Gei\ss and Gernot Veit Batz and Daniel Grund and Sebastian Hack and Adam M. Szalkowski},
title = {{G}r{G}en: A Fast {SPO}-based {G}raph {R}ewriting {T}ool},
booktitle = {International Conference on Graph Transformation},
booktitle_short = {ICGT},
year = {2006},
editor = {A. Corradini and H. Ehrig and U. Montanari and L. Ribeiro and G.
Rozenberg},
series = {Lecture Notes in Computer Science},
pages = {383--397},
month = {September},
publisher = {Springer},
note = {Natal, Brasil},
webpdf = {http://www.info.uni-karlsruhe.de/papers/grgen_icgt2006.pdf}
}
- Register Allocation for Programs in SSA-Form - CC 2006
Hack, S., Grund, D. and Goos, G.
Compiler Construction, pages 247–262, Springer, 2006.
[doi]
[pdf]
[bib]
@CONFERENCE{HGG:2006:RA_SSA,
author = {Sebastian Hack and Daniel Grund and Gerhard Goos},
title = {{R}egister {A}llocation for {P}rograms in {SSA}-{F}orm},
booktitle = {Compiler Construction},
booktitle_short = {CC},
year = {2006},
editor = {Andreas Zeller and Alan Mycroft},
volume = {3923},
series = {Lecture Notes In Computer Science},
pages = {247--262},
month = {March},
publisher = {Springer},
webpdf = {https://compilers.cs.uni-saarland.de/papers/ssara.pdf},
abstract = {As register allocation is one of the most important phases in optimizingcompilers,
much work has been done to improve its quality and speed.We present
a novel register allocation architecture for programs inSSA-form
which simplifies register allocation significantly. We investigatecertain
properties of SSA-programs and their interference graphs,showing
that they belong to the class of chordal graphs. This leadsto a quadratic-time
optimal coloring algorithm and allows for decouplingthe tasks of
coloring, spilling and coalescing completely. After presentingheuristic
methods for spilling and coalescing, we compare our coalescingheuristic
to an optimal method based on integer linear programming.},
doi = {10.1007/11688839_20},
journal = {Lecture Notes In Computer Science}
}
- Implementation Techniques for SPMD Kernels on CPUs
Meyer, J., Alpay, A., Hack, S., Fröning, H. and Heuveline, V.
Proceedings of the 2023 International Workshop on OpenCL, Association for Computing Machinery, 2023.
[doi]
[url]
[pdf]
[bib]
@inproceedings{Meyer:IWOCL23:10.1145/3585341.3585342,
author = {Meyer, Joachim and Alpay, Aksel and Hack, Sebastian and Fr\"oning, Holger and Heuveline, Vincent},
title = {Implementation Techniques for SPMD Kernels on CPUs},
year = {2023},
isbn = {9798400707452},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3585341.3585342},
webpdf = {https://dl.acm.org/doi/pdf/10.1145/3585341.3585342},
doi = {10.1145/3585341.3585342},
abstract = {More and more frameworks and simulations are developed using heterogeneous programming models such as OpenCL, SYCL, CUDA, or HIP. A significant hurdle to mapping these models to CPUs in a performance-portable manner is that implementing work-group barriers for such kernels requires providing forward-progress guarantees so that all work-items can reach the barrier. This work provides guidance for implementations of single-program multiple-data (SPMD) programming models, such as OpenCL, SYCL, CUDA, or HIP, on non-SPMD devices, such as CPUs. We discuss the trade-offs of multiple approaches to handling work-group-level barriers. We present our experience with the integration of two known compiler-based approaches for low-overhead work-group synchronization on CPUs. Thereby we discuss a general design flaw in deep loop fission approaches, as used in the popular Portable Computing Language (PoCL) project, that makes them miscompile certain kernels. For our evaluation, we integrate PoCL’s “loopvec” kernel compiler into hipSYCL and implement continuation-based synchronization (CBS) in the same. We compare both against hipSYCL’s library-only fiber implementation using diverse hardware: we use recent AMD Rome and Intel Icelake server CPUs but also two Arm server CPUs, namely Fujitsu’s A64FX and Marvell’s ThunderX2. We show that compiler-based approaches outperform library-only implementations by up to multiple orders of magnitude. Further, we adapt our CBS implementation into PoCL and compare it against its loopvec approach in both, PoCL and hipSYCL. We find that our implementation of CBS, while being more general than PoCL’s approach, gives comparable performance in PoCL and even surpasses it in hipSYCL. Therefore we recommend its use in general.},
booktitle = {Proceedings of the 2023 International Workshop on OpenCL},
articleno = {1},
numpages = {12},
keywords = {CPU, performance portability, barriers, OpenCL, compilation, synchronization, heterogeneous computing, SYCL},
location = {Cambridge, United Kingdom},
series = {IWOCL '23}
}
- Evaluation of Modern GPGPU Technologies for Image Processing
Meyer, J.
Proceedings of the International Workshop on OpenCL, Association for Computing Machinery, 2020.
[doi]
[url]
[bib]
@inproceedings{Meyer:IWOCL20:10.1145/3388333.3388645,
author = {Meyer, Joachim},
title = {Evaluation of Modern GPGPU Technologies for Image Processing},
year = {2020},
isbn = {9781450375313},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3388333.3388645},
doi = {10.1145/3388333.3388645},
booktitle = {Proceedings of the International Workshop on OpenCL},
articleno = {2},
numpages = {2},
keywords = {CUDA, Vulkan, SYCL, OpenCL, Image Processing, GPGPU, Evaluation},
location = {Munich, Germany},
series = {IWOCL '20}
}
- Multi-dimensional Vectorization in LLVM - WPMVP 2019
Moll, S., Sharma, S., Kurtenacker, M. and Hack, S.
Proceedings of the 5th Workshop on Programming Models for SIMD/Vector Processing, pages 3, 2019.
[pdf]
[bib]
@inproceedings{MSKH:WPMVP19,
title = {{M}ulti-dimensional {V}ectorization in {LLVM}},
author = {Moll, Simon and Sharma, Shrey and Kurtenacker, Matthias and Hack, Sebastian},
booktitle = {Proceedings of the 5th Workshop on Programming Models for SIMD/Vector Processing},
booktitle_short = {WPMVP},
pages = {3},
year = {2019},
organization = {ACM},
webpdf = {http://compilers.cs.uni-saarland.de/papers/moll_tensorrv_wpmvp19.pdf}
}
- A Data Layout Transformation for Vectorizing Compilers - WPMVP 2018
Pérard-Gayot, A., Membarth, R., Slusallek, P., Moll, S., Leißa, R. and Hack, S.
Proceedings of the 2018 4th Workshop on Programming Models for SIMD/Vector Processing, pages 7:1–7:8, ACM, 2018.
[doi]
[url]
[bib]
@inproceedings{PMS:WPMVP18,
author = {P{\'e}rard-Gayot, Ars\`{e}ne and Membarth, Richard and Slusallek, Philipp and Moll, Simon and Lei\ssa, Roland and Hack, Sebastian},
title = {{A} {D}ata {L}ayout {T}ransformation for {V}ectorizing {C}ompilers},
booktitle = {Proceedings of the 2018 4th Workshop on Programming Models for SIMD/Vector Processing},
series = {WPMVP'18},
booktitle_short = {WPMVP},
year = {2018},
isbn = {978-1-4503-5646-6},
location = {Vienna, Austria},
pages = {7:1--7:8},
articleno = {7},
numpages = {8},
url = {http://doi.acm.org/10.1145/3178433.3178440},
doi = {10.1145/3178433.3178440},
acmid = {3178440},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {Compiler, Optimization, Vectorization},
}
- PACXXv2 + RV: An LLVM-based Portable High-Performance Programming Model
Haidl, M., Moll, S., Klein, L., Sun, H., Hack, S. and Gorlatch, S.
Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC, pages 7:1–7:12, ACM, 2017.
[doi]
[url]
[bib]
@inproceedings{HMea:LLVMHPC17,
author = {Haidl, Michael and Moll, Simon and Klein, Lars and Sun, Huihui and Hack, Sebastian and Gorlatch, Sergei},
title = {PACXXv2 + RV: An LLVM-based Portable High-Performance Programming Model},
booktitle = {Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC},
series = {LLVM-HPC'17},
year = {2017},
isbn = {978-1-4503-5565-0},
location = {Denver, CO, USA},
pages = {7:1--7:12},
articleno = {7},
numpages = {12},
url = {http://doi.acm.org/10.1145/3148173.3148185},
doi = {10.1145/3148173.3148185},
acmid = {3148185},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {C++14, Compilers, LLVM, Performance, Vectorization},
}
- Synthesizing Hot Code Paths by Abductive Reasoning - CPC 2015 (no published proceedings)
Moll, S. and Hack, S.
The 18th International Workshop on Compilers for Parallel Computing, 2015 (no published proceedings).
[pdf]
[bib]
@INPROCEEDINGS{MH:2015:abduct,
author = {Simon Moll and Sebastian Hack},
title = {{S}ynthesizing {H}ot {C}ode {P}aths by {A}bductive {R}easoning},
booktitle = {The 18th International Workshop on Compilers for Parallel Computing},
booktitle_short = {CPC},
year = {2015 (no published proceedings)},
webpdf={http://compilers.cs.uni-saarland.de/papers/moll_hotcodepaths_cpc15.pdf}
}
- Polly's Polyhedral Scheduling in the Presence of Reductions - IMPACT 2015
Doerfert, J., Streit, K., Hack, S. and Benaissa, Z.
International Workshop on Polyhedral Compilation Techniques, 2015.
[pdf]
[bib]
@INPROCEEDINGS{Doerfert:2015:PollyRed,
title = {Polly's Polyhedral Scheduling in the Presence of Reductions},
author = {Johannes Doerfert and Kevin Streit and Sebastian Hack and Zino Benaissa},
year = {2015},
month = {Jan},
address = {Amsterdam, Netherlands},
booktitle = {{I}nternational {W}orkshop on {P}olyhedral {C}ompilation {T}echniques},
booktitle_short = {IMPACT},
webpdf = {http://impact.gforge.inria.fr/impact2015/papers/impact2015-doerfert.pdf},
abstract = {
The polyhedral model provides a powerful mathematical abstraction to
enable effective optimization of loop nests with respect to a given
optimization goal, e.g., exploiting parallelism. Unexploited
reduction properties are a frequent reason for polyhedral optimizers
to assume parallelism prohibiting dependences. To our knowledge, no
polyhedral loop optimizer available in any production compiler
provides support for reductions. In this paper, we show that
leveraging the parallelism of reductions can lead to a significant
performance increase. We give a precise, dependence based, definition
of reductions and discuss ways to extend polyhedral optimization to
exploit the associativity and commutativity of reduction
computations. We have implemented a reduction-enabled scheduling
approach in the Polly polyhedral optimizer and evaluate it on the
standard Polybench 3.2 benchmark suite. We were able to detect and
model all 52 arithmetic reductions and achieve speedups up to 2.21×
on a quad core machine by exploiting the multidimensional reduction
in the BiCG benchmark.
},
}
- A Framework for the Optimization of the WCET of Programs on Multi-Core Processors
John, M. and Jacobs, M.
Proceedings of the 8th Junior Researcher Workshop on Real-Time Computing, pages 1-4, 2014.
[url]
[pdf]
[bib]
@INPROCEEDINGS{JRWRTC2014:FrameworkWCETOptimizationMultiCore,
author = {Maximilian John and Michael Jacobs},
title = {A Framework for the Optimization of the {WCET} of Programs on Multi-Core Processors},
booktitle = {Proceedings of the 8th Junior Researcher Workshop on Real-Time Computing},
series = {JRWRTC 2014},
year = {2014},
pages = {1-4},
webpdf = {http://www.cdl.uni-saarland.de/papers/john_jacobs_jrwrtc14.pdf},
url = {http://www.cister.isep.ipp.pt/jrwrtc2014/}
}
- Platform-Specific Optimization and Mapping of Stencil Codes through Refinement - HiStencils 2014
Köster, M., Leißa, R., Hack, S., Membarth, R. and Slusallek, P.
International Workshop on High-Performance Stencil Computations, 2014.
[pdf]
[bib]
@INPROCEEDINGS{KLHMS:2014:Impala,
author = {Marcel K{\"o}ster and Roland Lei{\ss}a and Sebastian Hack and Richard Membarth and Philipp Slusallek},
title = {Platform-Specific Optimization and Mapping of Stencil Codes through Refinement},
booktitle = {International Workshop on High-Performance Stencil Computations},
booktitle_short = {HiStencils},
year = {2014},
webpdf = {http://www.cdl.uni-saarland.de/papers/klhms14.pdf},
location = {Vienna, Austria},
numpages = {6},
}
- Sierra: A SIMD Extension for C++ - WPMVP 2014
Leißa, R., Haffner, I. and Hack, S.
International Workshop on Programming Models for SIMD/Vector Processing, 2014.
[doi]
[pdf]
[bib]
@INPROCEEDINGS{LHH:2014:Sierra,
author = {Roland Lei{\ss}a and Immanuel Haffner and Sebastian Hack},
title = {{S}ierra: {A} {SIMD} {E}xtension for {C}++},
booktitle = {International Workshop on Programming Models for SIMD/Vector Processing},
booktitle_short = {WPMVP},
year = {2014},
doi = {10.1145/2568058.2568062},
webpdf = {http://www.cdl.uni-saarland.de/papers/lhh14.pdf},
location = {Orlando, Florida},
numpages = {8},
}
- Target-Specific Refinement of Multigrid Codes - WOLFHPC 2014
Membarth, R., Slusallek, P., Köster, M., Leißa, R. and Hack, S.
International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing, pages 1–6, 2014.
[doi]
[pdf]
[bib]
@INPROCEEDINGS{MSKLH:2014:WOLFHPC,
author = {Membarth, Richard and Slusallek, Philipp and K{\"o}ster, Marcel and Lei{\ss}a, Roland and Hack, Sebastian},
address = {New Orleans, LA, USA},
booktitle = {International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing},
booktitle_short = {WOLFHPC},
title = {{T}arget-{S}pecific {R}efinement of {M}ultigrid {C}odes},
pages = {1--6},
year = 2014,
month = nov,
date = {2014-11-17},
doi = {10.1109/WOLFHPC.2014.5},
organization = {IEEE},
webpdf = {http://www.cdl.uni-saarland.de/papers/wolfhpc14.pdf},
}
- Improving the Precision of Approximations in WCET Analysis for Multi-Core Processors
(Best Paper Award)
Jacobs, M.
Proceedings of the 7th Junior Researcher Workshop on Real-Time Computing, pages 1-4, 2013.
[url]
[pdf]
[bib]
@INPROCEEDINGS{JRWRTC2013:ImprovingPrecisionWcetAnalysisMulticore,
author = {Michael Jacobs},
title = {Improving the Precision of Approximations in {WCET} Analysis for Multi-Core Processors},
booktitle = {Proceedings of the 7th Junior Researcher Workshop on Real-Time Computing},
series = {JRWRTC 2013},
award = {Best Paper Award},
year = {2013},
pages = {1-4},
webpdf = {http://www.cdl.uni-saarland.de/papers/jacobs_jrwrtc2013.pdf},
url = {http://jrwrtc.science.uva.nl/}
}
- SPolly: Speculative Optimizations in the Polyhedral Model - IMPACT 2013
Doerfert, J., Hammacher, C., Streit, K. and Hack, S.
International Workshop on Polyhedral Compilation Techniques, pages 55–61, 2013.
[pdf]
[bib]
@INPROCEEDINGS{Doerfert:2013:SPolly,
title = {{SP}olly: {S}peculative {O}ptimizations in the {P}olyhedral {M}odel},
author = {Johannes Doerfert and Clemens Hammacher and Kevin Streit and Sebastian Hack},
year = {2013},
month = jan,
address = {Berlin, Germany},
booktitle = {{I}nternational {W}orkshop on {P}olyhedral {C}ompilation {T}echniques},
booktitle_short = {IMPACT},
editors = {Armin Größlinger and Louis-Noël Pouchet},
pages = {55--61},
webpdf = {http://www.st.cs.uni-saarland.de/publications/files/doerfert-impact-2013.pdf},
abstract = {
The polyhedral model is only applicable to code regions that form static
control parts (SCoPs) or slight extensions thereof. To apply polyhedral
techniques to a piece of code, the compiler usually checks, by static
analysis, whether all SCoP conditions are fulfilled. However, in many
codes, the compiler fails to verify that this is the case. In this paper
we investigate the rejection causes as reported by Polly, the polyhedral
optimizer of a state-of-the-art compiler. We show that many rejections
follow from the conservative overapproximation of the employed static
analyses. In SPolly, a speculative extension of Polly, we employ the
knowledge of runtime features to supersede this overapproximation. All
speculatively generated variants form valid SCoPs and are optimizable by
the facilities of Polly. Our evaluation shows that SPolly is able to
effectively widen the applicability of polyhedral optimization. On the
SPEC 2000 suite, the number of optimizable code regions is increased by
131 percent. In 10 out of the 31 benchmarks of the PolyBench suite,
SPolly achieves speedups of up to 11-fold as compared to plain Polly.
},
}
- Sambamba: Runtime Adaptive Parallel Execution - ADAPT 2013
Streit, K., Hammacher, C., Zeller, A. and Hack, S.
International Workshop on Adaptive Self-Tuning Computing Systems, pages 7:1–7:6, ACM, 2013.
[doi]
[url]
[bib]
@INPROCEEDINGS{Streit:2013:SRA,
author = {Streit, Kevin and Hammacher, Clemens and Zeller, Andreas and Hack, Sebastian},
title = {{S}ambamba: {R}untime {A}daptive {P}arallel {E}xecution},
booktitle = {International Workshop on Adaptive Self-Tuning Computing Systems},
booktitle_short = {ADAPT},
year = {2013},
isbn = {978-1-4503-2022-1},
location = {Berlin, Germany},
pages = {7:1--7:6},
articleno = {7},
numpages = {6},
url = {http://doi.acm.org/10.1145/2484904.2484911},
doi = {10.1145/2484904.2484911},
acmid = {2484911},
publisher = {ACM},
address = {New York, NY, USA},
keywords = {automatic parallelization, just-in-time compilation, parallelization},
}
- Profiling Java Programs for Parallelism - IWMSE 2009
Hammacher, C., Streit, K., Hack, S. and Zeller, A.
International Workshop on Multi-Core Software Engineering, 2009.
[bib]
@INPROCEEDINGS{HSHZ:2009:Profiling,
author = {Clemens Hammacher and Kevin Streit and Sebastian Hack and Andreas
Zeller},
title = {{P}rofiling {J}ava {P}rograms for {P}arallelism},
booktitle = {International Workshop on Multi-Core Software Engineering},
booktitle_short = {IWMSE},
year = {2009},
month = {May},
location = {Vancouver, BC, Canada},
}
